Rafael Kioji Vivas Maeda

Rafael Kioji Vivas Maeda

PhD student at HKUST

Location
Computer architecture
Industry
Hong Kong

My full LinkedIn profile:

www.linkedin.com/in/rafaelkioji

Google Scholar profile:

scholar.google.com/citations...

Summary

My current research focuses on performance modeling of multicore processors. I have experience developing and using the most common simulation techniques including cycle-accurate simulation, sampling techniques, statistical models, and emulation (e.g. QEMU).

I am proficient in embedded systems and digital circuits design. That includes FPGA/ASIC/SoC development, low-level C/C++ programming, and board-level debugging. I am also interested in virtual-prototyping, verification, and FPGA emulation.

My key skill set includes:
- Modern C/C++ (11/14) including popular libraries (STL, Boost, PThread).
- Programming in Linux environment (makefiles, bash scripting).
- VHDL and SystemC for high-level modeling, verification, and RTL design.
- FPGA/ASIC design flow (Altera, Cadence, Synopsis, and Mentor tools).

This badget has been created based on my public LinkedIn profile.