Rafael Kioji Vivas Maeda
PhD student at HKUST
- Computer architecture
- Hong Kong
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My current research focuses on performance modeling of multicore processors. I have experience developing and using the most common simulation techniques including cycle-accurate simulation, sampling techniques, statistical models, and emulation (e.g. QEMU).
I am proficient in embedded systems and digital circuits design. That includes FPGA/ASIC/SoC development, low-level C/C++ programming, and board-level debugging. I am also interested in virtual-prototyping, verification, and FPGA emulation.
My key skill set includes:
- Modern C/C++ (11/14) including popular libraries (STL, Boost, PThread).
- Programming in Linux environment (makefiles, bash scripting).
- VHDL and SystemC for high-level modeling, verification, and RTL design.
- FPGA/ASIC design flow (Altera, Cadence, Synopsis, and Mentor tools).